Needs for OCC: Line code, Scrambler, Interleaving, and CRC

This post discusses several aspects of light communication as follows

  1. Line Coding: What and Why Line Coding is needed? Other choices?
  2. Scrambler: What is a Scrambler? OCC needs this?
  3. Interleaving: Purpose and Generation.
  4. Cyclic Redundancy Check: Where it is applied.

 


Run-length limited code for Visible Light Communication

According to Wikipedia, for reliable clock recovery at the receiver, a maximum run length constraint may be imposed on the generated channel sequence, i.e., the maximum number of consecutive ones or zeros is bounded to a reasonable number. A clock period is recovered by observing transitions in the received sequence, so that a maximum run length guarantees such clock recovery, while sequences without such a constraint could seriously hamper the detection quality.

Run-length limited or RLL coding is a line coding technique that is used to send arbitrary data over a communications channel with bandwidth limits. RLL codes are defined by four main parameters: mndk. The first two, m/n, refer to the rate of the code, while the remaining two specify the minimal d and maximal k number of zeroes between consecutive ones.

Particular RLL codes are used in Light Communication to provide DC-balance since flicker mitigation is required in visible light communication (except some OCC modes).

In light communication, flicker mitigation can be divided into intra-frame mitigation and interframe flicker mitigation.

Intra-frame flicker mitigation refers to mitigation flicker within the transmission of a data frame. Intra-frame flicker in OOK is avoided by the use of the dimmed OOK mode and RLL coding. On the other hand, Interframe flicker is avoided by ensuring constant average power across multiple light sources along with scrambling and the high optical clock rates.

Question 1: One small question regarding the use of RLL in Infrared (IR) light communication is that whether RLL is required for IR to avoid flickering?

The answer is NO because IR itself is not perceptible by human eyes. So the reason RLL is applied in IR communication is involving to its primary purpose (to support reliable clock recovery at the receiver).

Question 2: Is there any other choice to mitigate flicker without using RLL? Sometimes the reduction of the bit rate makes RLL less attractive.

The answer is YES. Regarding the DC-balance requirement, Hadamard Coded Modulation (HCM) is a bit to symbol mapper that is applied to the signal after OOK or PAM and removes the need for line coding.

Question 3: What types of RLL codes are suggested in IEEE 802.15.7-2011 std. and IEEE 802.15.7m std.?

Manchester code, 4B6B, or 8B10B depending on the PHY operating mode.

 


Scrambler 

In a high clock rate VLC mode, a scrambler is applied to generate better light quality across the modulation. In OCC modes, we do not use because OCC operates at low optical clock rates at which the value of the scrambler is not as expected.

A scrambler shall be used to ensure pseudo-random data for the PHY III of IEEE 802.15.7-2011. The scrambler shall be applied to the entire PSDU. In addition, the scrambler shall be initialized to a seed value dependent on the topology-dependent pattern at the beginning of the PSDU. The polynomial generator, g(D), for the pseudo-random binary sequence (PRBS) generator shall be

g(D) = 1 + D14 + D15

where D is a single bit delay element.

scrambler phy 3.PNG
Figure 1 – Scrambler block diagram for PHY III

 


Interleaver

The error that occurs in many consecutive bits rather than occurring in bits independently of each other is called burst error. In many cases, because of this huge amount of error happens within the same data frame, the correction is impossible. An interleaver becomes helpful.

Question is where to apply an interleaver into our OCC system? Most VLC and OCC systems implement the convolutional code as an inner FEC and the Reed-Solomon code as an outer FEC. A block interleaver is used for interleaving the bits between the inner convolutional code and the outer RS code. The allocation of an interleaver in between inner FEC and outer FEC helps the combination of two codes performs better.

The interleaver is of a fixed height n but has a flexible depth D, dependent on the frame size. The flexible depth of the interleaver and the puncturing block after the interleaver is used to minimize padding overhead.

Table 1 -Example of combined FEC codes with an interleaver for an OCC system

Outer Code Interleaver Inner code
PHR, PSDU, Ab bits RS(15,7) n=15 CC(1/4)

 


Cyclic redundancy check

A cyclic redundancy check is included in the MAC frame and the PHY header to verify the validity of the received data.

The CRC field is 2 octets in length. The CRC shall be calculated using the following standard generator polynomial of degree 16:

FCS CRC-16.PNG
Figure 2 – Typical CRC implementation

 

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